1. Field
Embodiments relate to a method of crystallizing a silicon layer and a method of forming a thin film transistor using the same.
2. Description of the Related Art
Thin film transistors (TFTs) are a particular kind of field effect transistors that are formed by forming a semiconductor thin film on an insulating support substrate. Like a field effect transistor, a TFT includes a gate, a drain, and a source, and the major function of the TFT is a switching operation. TFTs may be used in sensors, memory devices, and optical devices and may be used as a pixel switching device or as an operating device of a flat panel display.
In general, commercially available products, e.g., notebook PCs, monitors, TVs, or mobile devices, may include an amorphous-silicon TFT (a-Si TFT). Amorphous-silicon refers to a certain type of silicon of which an atomic arrangement is, irregular, and has a short range order and does not have a long range order, unlike that of a crystal. Amorphous-silicon may be easily deposited over a large area and may be easily formed on a glass substrate at low temperatures. Due to these features, amorphous-silicon may be the most frequently used material in TFTs. However, since demand for large high-quality displays is increasing, high-performance devices are desired. Thus, high-performance TFTs having a higher electron mobility rate than that possible with an a-Si TFT, which has an electron mobility rate of about 0.5 to about 1 cm2/Vs, and a method of manufacturing the high-performance TFTs are also desired.
A polycrystalline silicon TFT (poly-Si TFT) may exhibit a substantially high performance compared to a conventional a-Si TFT. An electron mobility rate of a polycrystalline silicon TFT may be in the range of a few to several hundred cm2/Vs. Due to these features, a poly-Si TFT may allow, e.g., a data operating circuit or peripheral circuit requiring a high electron mobility rate to be mounted on a substrate, and may also allow formation of a small channel of a TFT so as to increase an aperture ratio of a screen. In addition, since there may be no limitation on an interconnection pitch for connection to an operating circuit along with an increasing pixel number, due to the installation of the operating circuit, high-resolution may be obtained. Also, operating voltage and electric power consumption may be reduced, and device characteristics may be far less degraded.
Methods of forming polycrystalline silicon may be categorized into a low temperature process and a high temperature process, according to a process temperature. In a high temperature process, an expensive quartz substrate with a high thermal resistance may be used instead of a glass substrate because the process temperature may be equal to or higher than a temperature at which an insulating substrate is deformed. In addition, a polycrystalline silicon layer formed by using the high-temperature process may have low-quality crystallinity, e.g., high surface roughness or micro grains.
In a low temperature process, amorphous silicon that is deposited at a low temperature may be crystallized into a polycrystalline silicon. As a low-temperature crystallization technique, an eximer laser crystallization (ELC) technique and a crystallization technique using a metal as a catalyst have been researched. In the ELC technique, melting and solidification of amorphous silicon may be repeatedly performed by irradiating a pulse-type laser beam onto a substrate in a unit of a nano second. The laser crystallization technique, however, may be expensive, time-consuming, and inefficient.
When amorphous silicon is crystallized into polycrystalline silicon by using a crystallization technique using a metallic catalyst, micro-control of the metallic catalyst may be important. A metallic catalyst may be deposited or coated on an amorphous silicon layer by, e.g., a sputtering method such as physical vapor deposition (PVD), chemical vapor deposition (CVD) such as atomic layer deposition (ALD), or ion implantation.